1367 lines
28 KiB
Plaintext
1367 lines
28 KiB
Plaintext
%TF.GenerationSoftware,KiCad,Pcbnew,10.0.4-1.fc44app2*%
|
|
%TF.CreationDate,2026-08-06T21:58:06+02:00*%
|
|
%TF.ProjectId,STM32G474_FOC_CONTROLLER,53544d33-3247-4343-9734-5f464f435f43,rev?*%
|
|
%TF.SameCoordinates,Original*%
|
|
%TF.FileFunction,Copper,L1,Top*%
|
|
%TF.FilePolarity,Positive*%
|
|
%FSLAX46Y46*%
|
|
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
|
|
G04 Created by KiCad (PCBNEW 10.0.4-1.fc44app2) date 2026-08-06 21:58:06*
|
|
%MOMM*%
|
|
%LPD*%
|
|
G01*
|
|
G04 APERTURE LIST*
|
|
G04 Aperture macros list*
|
|
%AMRoundRect*
|
|
0 Rectangle with rounded corners*
|
|
0 $1 Rounding radius*
|
|
0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners*
|
|
0 Add a 4 corners polygon primitive as box body*
|
|
4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0*
|
|
0 Add four circle primitives for the rounded corners*
|
|
1,1,$1+$1,$2,$3*
|
|
1,1,$1+$1,$4,$5*
|
|
1,1,$1+$1,$6,$7*
|
|
1,1,$1+$1,$8,$9*
|
|
0 Add four rect primitives between the rounded corners*
|
|
20,1,$1+$1,$2,$3,$4,$5,0*
|
|
20,1,$1+$1,$4,$5,$6,$7,0*
|
|
20,1,$1+$1,$6,$7,$8,$9,0*
|
|
20,1,$1+$1,$8,$9,$2,$3,0*%
|
|
G04 Aperture macros list end*
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD10C,1.500000*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD11RoundRect,0.250000X-0.420000X-0.945000X0.420000X-0.945000X0.420000X0.945000X-0.420000X0.945000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD12RoundRect,0.250000X-1.000000X-0.650000X1.000000X-0.650000X1.000000X0.650000X-1.000000X0.650000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD13RoundRect,0.140000X-0.140000X-0.170000X0.140000X-0.170000X0.140000X0.170000X-0.140000X0.170000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD14RoundRect,0.250000X-0.250000X-0.475000X0.250000X-0.475000X0.250000X0.475000X-0.250000X0.475000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD15RoundRect,0.250000X-0.325000X-1.100000X0.325000X-1.100000X0.325000X1.100000X-0.325000X1.100000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,ComponentPad*%
|
|
%ADD16RoundRect,0.250001X-0.499999X-0.499999X0.499999X-0.499999X0.499999X0.499999X-0.499999X0.499999X0*%
|
|
%TD*%
|
|
%TA.AperFunction,ComponentPad*%
|
|
%ADD17C,1.500000*%
|
|
%TD*%
|
|
%TA.AperFunction,ComponentPad*%
|
|
%ADD18RoundRect,0.250000X-0.600000X-0.600000X0.600000X-0.600000X0.600000X0.600000X-0.600000X0.600000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,ComponentPad*%
|
|
%ADD19C,1.700000*%
|
|
%TD*%
|
|
%TA.AperFunction,ComponentPad*%
|
|
%ADD20RoundRect,0.249999X-0.790001X-1.550001X0.790001X-1.550001X0.790001X1.550001X-0.790001X1.550001X0*%
|
|
%TD*%
|
|
%TA.AperFunction,ComponentPad*%
|
|
%ADD21O,2.080000X3.600000*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD22R,0.600000X0.250000*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD23R,0.250000X0.600000*%
|
|
%TD*%
|
|
%TA.AperFunction,HeatsinkPad*%
|
|
%ADD24C,0.370000*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD25R,3.700000X5.700000*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD26RoundRect,0.225000X-0.225000X-0.250000X0.225000X-0.250000X0.225000X0.250000X-0.225000X0.250000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD27RoundRect,0.200000X-0.200000X-0.275000X0.200000X-0.275000X0.200000X0.275000X-0.200000X0.275000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD28RoundRect,0.243750X-0.243750X-0.456250X0.243750X-0.456250X0.243750X0.456250X-0.243750X0.456250X0*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD29RoundRect,0.150000X-0.512500X-0.150000X0.512500X-0.150000X0.512500X0.150000X-0.512500X0.150000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD30RoundRect,0.150000X-0.150000X-0.425000X0.150000X-0.425000X0.150000X0.425000X-0.150000X0.425000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD31RoundRect,0.075000X-0.075000X-0.500000X0.075000X-0.500000X0.075000X0.500000X-0.075000X0.500000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,ComponentPad*%
|
|
%ADD32O,1.000000X2.100000*%
|
|
%TD*%
|
|
%TA.AperFunction,ComponentPad*%
|
|
%ADD33O,1.000000X1.800000*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD34RoundRect,0.250000X-1.500000X-0.550000X1.500000X-0.550000X1.500000X0.550000X-1.500000X0.550000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,ComponentPad*%
|
|
%ADD35R,1.700000X1.700000*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD36R,2.900000X5.400000*%
|
|
%TD*%
|
|
%TA.AperFunction,ComponentPad*%
|
|
%ADD37RoundRect,0.250000X-0.600000X-0.750000X0.600000X-0.750000X0.600000X0.750000X-0.600000X0.750000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,ComponentPad*%
|
|
%ADD38O,1.700000X2.000000*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD39R,0.850000X2.800000*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD40RoundRect,0.075000X-0.662500X-0.075000X0.662500X-0.075000X0.662500X0.075000X-0.662500X0.075000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD41RoundRect,0.075000X-0.075000X-0.662500X0.075000X-0.662500X0.075000X0.662500X-0.075000X0.662500X0*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD42RoundRect,0.135000X-0.135000X-0.185000X0.135000X-0.185000X0.135000X0.185000X-0.135000X0.185000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD43R,1.550000X0.600000*%
|
|
%TD*%
|
|
%TA.AperFunction,ComponentPad*%
|
|
%ADD44C,0.600000*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD45R,2.600000X3.100000*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD46R,2.950000X4.500000*%
|
|
%TD*%
|
|
%TA.AperFunction,ComponentPad*%
|
|
%ADD47O,2.200000X3.500000*%
|
|
%TD*%
|
|
%TA.AperFunction,ComponentPad*%
|
|
%ADD48R,1.500000X2.500000*%
|
|
%TD*%
|
|
%TA.AperFunction,ComponentPad*%
|
|
%ADD49O,1.500000X2.500000*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD50R,0.600000X0.200000*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD51R,0.150000X0.250000*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD52R,0.200000X0.600000*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD53RoundRect,0.250000X-0.450000X-0.350000X0.450000X-0.350000X0.450000X0.350000X-0.450000X0.350000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,ComponentPad*%
|
|
%ADD54RoundRect,0.250000X-0.600000X-0.725000X0.600000X-0.725000X0.600000X0.725000X-0.600000X0.725000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,ComponentPad*%
|
|
%ADD55O,1.700000X1.950000*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD56RoundRect,0.375000X-0.625000X-0.375000X0.625000X-0.375000X0.625000X0.375000X-0.625000X0.375000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD57RoundRect,0.500000X-0.500000X-1.400000X0.500000X-1.400000X0.500000X1.400000X-0.500000X1.400000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD58RoundRect,0.100000X-0.637500X-0.100000X0.637500X-0.100000X0.637500X0.100000X-0.637500X0.100000X0*%
|
|
%TD*%
|
|
%TA.AperFunction,SMDPad,CuDef*%
|
|
%ADD59RoundRect,0.125000X-0.537500X-0.125000X0.537500X-0.125000X0.537500X0.125000X-0.537500X0.125000X0*%
|
|
%TD*%
|
|
G04 APERTURE END LIST*
|
|
D10*
|
|
%TO.P,TP6,1,1_1*%
|
|
%TO.N,/stm32/SENS_A*%
|
|
X134715000Y-80385000D03*
|
|
%TD*%
|
|
D11*
|
|
%TO.P,C5,1*%
|
|
%TO.N,+5V*%
|
|
X95990000Y-94815000D03*
|
|
%TO.P,C5,2*%
|
|
%TO.N,GND*%
|
|
X99070000Y-94815000D03*
|
|
%TD*%
|
|
D12*
|
|
%TO.P,D2,1,K_1*%
|
|
%TO.N,+5V*%
|
|
X121190000Y-95565000D03*
|
|
%TO.P,D2,2,A_2*%
|
|
%TO.N,VBUS*%
|
|
X125190000Y-95565000D03*
|
|
%TD*%
|
|
D13*
|
|
%TO.P,C11,1*%
|
|
%TO.N,/stm32/HSE_OUT*%
|
|
X137445000Y-96415000D03*
|
|
%TO.P,C11,2*%
|
|
%TO.N,Net-(C10-Pad2)*%
|
|
X138405000Y-96415000D03*
|
|
%TD*%
|
|
%TO.P,C21,1*%
|
|
%TO.N,/stm32/SENS_B*%
|
|
X107665000Y-102795000D03*
|
|
%TO.P,C21,2*%
|
|
%TO.N,GND*%
|
|
X108625000Y-102795000D03*
|
|
%TD*%
|
|
D14*
|
|
%TO.P,C12,1*%
|
|
%TO.N,VDD*%
|
|
X159865000Y-70805000D03*
|
|
%TO.P,C12,2*%
|
|
%TO.N,GND*%
|
|
X161765000Y-70805000D03*
|
|
%TD*%
|
|
D15*
|
|
%TO.P,C2,1*%
|
|
%TO.N,Net-(C1-Pad2)*%
|
|
X120470000Y-82365000D03*
|
|
%TO.P,C2,2*%
|
|
%TO.N,Net-(C2-Pad2)*%
|
|
X123420000Y-82365000D03*
|
|
%TD*%
|
|
D16*
|
|
%TO.P,J9,1,Pin_1_1*%
|
|
%TO.N,Net-(J9-Pin_1)*%
|
|
X151205000Y-109345000D03*
|
|
D17*
|
|
%TO.P,J9,2,Pin_2_2*%
|
|
%TO.N,Net-(J9-Pin_2)*%
|
|
X154205000Y-109345000D03*
|
|
%TO.P,J9,3,Pin_3_3*%
|
|
%TO.N,Net-(J9-Pin_3)*%
|
|
X157205000Y-109345000D03*
|
|
%TO.P,J9,4,Pin_4_4*%
|
|
%TO.N,+5V*%
|
|
X151205000Y-112345000D03*
|
|
%TO.P,J9,5,Pin_5_5*%
|
|
%TO.N,GND*%
|
|
X154205000Y-112345000D03*
|
|
%TO.P,J9,6,Pin_6_6*%
|
|
%TO.N,unconnected-(J9-Pin_6-Pad6)*%
|
|
X157205000Y-112345000D03*
|
|
%TD*%
|
|
D18*
|
|
%TO.P,J10,1,Pin_1_1*%
|
|
%TO.N,unconnected-(J10-Pin_1-Pad1)*%
|
|
X132300000Y-105525000D03*
|
|
D19*
|
|
%TO.P,J10,2,Pin_2_2*%
|
|
%TO.N,+5V*%
|
|
X134840000Y-105525000D03*
|
|
%TO.P,J10,3,Pin_3_3*%
|
|
%TO.N,unconnected-(J10-Pin_3-Pad3)*%
|
|
X132300000Y-108065000D03*
|
|
%TO.P,J10,4,Pin_4_4*%
|
|
%TO.N,unconnected-(J10-Pin_4-Pad4)*%
|
|
X134840000Y-108065000D03*
|
|
%TO.P,J10,5,Pin_5_5*%
|
|
%TO.N,/stm32/Encoders/ENC_AL*%
|
|
X132300000Y-110605000D03*
|
|
%TO.P,J10,6,Pin_6_6*%
|
|
%TO.N,/stm32/Encoders/ENC_AH*%
|
|
X134840000Y-110605000D03*
|
|
%TO.P,J10,7,Pin_7_7*%
|
|
%TO.N,/stm32/Encoders/ENC_BL*%
|
|
X132300000Y-113145000D03*
|
|
%TO.P,J10,8,Pin_8_8*%
|
|
%TO.N,/stm32/Encoders/ENC_BH*%
|
|
X134840000Y-113145000D03*
|
|
%TO.P,J10,9,Pin_9_9*%
|
|
%TO.N,/stm32/Encoders/ENC_ZL*%
|
|
X132300000Y-115685000D03*
|
|
%TO.P,J10,10,Pin_10_10*%
|
|
%TO.N,/stm32/Encoders/ENC_ZH*%
|
|
X134840000Y-115685000D03*
|
|
%TD*%
|
|
D20*
|
|
%TO.P,J2,1,Pin_1_1*%
|
|
%TO.N,+15V*%
|
|
X113285000Y-64970000D03*
|
|
D21*
|
|
%TO.P,J2,2,Pin_2_2*%
|
|
%TO.N,GND*%
|
|
X118365000Y-64970000D03*
|
|
%TD*%
|
|
D13*
|
|
%TO.P,C19,1*%
|
|
%TO.N,VDDA*%
|
|
X143185000Y-96415000D03*
|
|
%TO.P,C19,2*%
|
|
%TO.N,GND*%
|
|
X144145000Y-96415000D03*
|
|
%TD*%
|
|
D22*
|
|
%TO.P,U10,1,NC_1*%
|
|
%TO.N,unconnected-(U10A-NC-Pad1)*%
|
|
X106050000Y-116235000D03*
|
|
%TO.P,U10,2,AGND_2*%
|
|
%TO.N,GND*%
|
|
X106050000Y-116735000D03*
|
|
%TO.P,U10,3,FB_BK_3*%
|
|
%TO.N,Net-(U10B-FB_BK)*%
|
|
X106050000Y-117235000D03*
|
|
%TO.P,U10,4,GND_BK_4*%
|
|
%TO.N,GND*%
|
|
X106050000Y-117735000D03*
|
|
%TO.P,U10,5,SW_BK_5*%
|
|
%TO.N,Net-(U10B-SW_BK)*%
|
|
X106050000Y-118235000D03*
|
|
%TO.P,U10,6,CPL_6*%
|
|
%TO.N,Net-(U10A-CPL)*%
|
|
X106050000Y-118735000D03*
|
|
%TO.P,U10,7,CPH_7*%
|
|
%TO.N,Net-(U10A-CPH)*%
|
|
X106050000Y-119235000D03*
|
|
%TO.P,U10,8,CP_8*%
|
|
%TO.N,Net-(U10A-CP)*%
|
|
X106050000Y-119735000D03*
|
|
%TO.P,U10,9,VM_9*%
|
|
%TO.N,+15V*%
|
|
X106050000Y-120235000D03*
|
|
%TO.P,U10,10,VM_10*%
|
|
X106050000Y-120735000D03*
|
|
%TO.P,U10,11,VM_11*%
|
|
X106050000Y-121235000D03*
|
|
%TO.P,U10,12,PGND_12*%
|
|
%TO.N,GND*%
|
|
X106050000Y-121735000D03*
|
|
D23*
|
|
%TO.P,U10,13,OUTA_13*%
|
|
%TO.N,/drv8316/OUT_A*%
|
|
X106675000Y-122310000D03*
|
|
%TO.P,U10,14,OUTA_14*%
|
|
X107175000Y-122310000D03*
|
|
%TO.P,U10,15,PGND_15*%
|
|
%TO.N,GND*%
|
|
X107675000Y-122310000D03*
|
|
%TO.P,U10,16,OUTB_16*%
|
|
%TO.N,/drv8316/OUT_B*%
|
|
X108175000Y-122310000D03*
|
|
%TO.P,U10,17,OUTB_17*%
|
|
X108675000Y-122310000D03*
|
|
%TO.P,U10,18,PGND_18*%
|
|
%TO.N,GND*%
|
|
X109175000Y-122310000D03*
|
|
%TO.P,U10,19,OUTC_19*%
|
|
%TO.N,/drv8316/OUT_C*%
|
|
X109675000Y-122310000D03*
|
|
%TO.P,U10,20,OUTC_20*%
|
|
X110175000Y-122310000D03*
|
|
D22*
|
|
%TO.P,U10,21,DRVOFF_21*%
|
|
%TO.N,/drv8316/DRV_OFF*%
|
|
X110800000Y-121735000D03*
|
|
%TO.P,U10,22,NFAULT_22*%
|
|
%TO.N,/drv8316/NFAULT*%
|
|
X110800000Y-121235000D03*
|
|
%TO.P,U10,23,NSLEEP_23*%
|
|
%TO.N,VDD*%
|
|
X110800000Y-120735000D03*
|
|
%TO.P,U10,24,VSEL_BK_24*%
|
|
%TO.N,GND*%
|
|
X110800000Y-120235000D03*
|
|
%TO.P,U10,25,AVDD_25*%
|
|
%TO.N,DRV_VDDA*%
|
|
X110800000Y-119735000D03*
|
|
%TO.P,U10,26,AGND_26*%
|
|
%TO.N,GND*%
|
|
X110800000Y-119235000D03*
|
|
%TO.P,U10,27,INHA_27*%
|
|
%TO.N,/stm32/PWM_A*%
|
|
X110800000Y-118735000D03*
|
|
%TO.P,U10,28,INLA_28*%
|
|
%TO.N,/stm32/PWM_An*%
|
|
X110800000Y-118235000D03*
|
|
%TO.P,U10,29,INHB_29*%
|
|
%TO.N,/stm32/PWM_B*%
|
|
X110800000Y-117735000D03*
|
|
%TO.P,U10,30,INLB_30*%
|
|
%TO.N,/stm32/PWM_Bn*%
|
|
X110800000Y-117235000D03*
|
|
%TO.P,U10,31,INHC_31*%
|
|
%TO.N,/stm32/PWM_C*%
|
|
X110800000Y-116735000D03*
|
|
%TO.P,U10,32,INLC_32*%
|
|
%TO.N,/stm32/PWM_Cn*%
|
|
X110800000Y-116235000D03*
|
|
D23*
|
|
%TO.P,U10,33,MODE_33*%
|
|
%TO.N,Net-(U10A-MODE)*%
|
|
X110175000Y-115660000D03*
|
|
%TO.P,U10,34,SLEW_34*%
|
|
%TO.N,unconnected-(U10A-SLEW-Pad34)*%
|
|
X109675000Y-115660000D03*
|
|
%TO.P,U10,35,OCP/SR_35*%
|
|
%TO.N,DRV_VDDA*%
|
|
X109175000Y-115660000D03*
|
|
%TO.P,U10,36,GAIN_36*%
|
|
%TO.N,unconnected-(U10A-GAIN-Pad36)*%
|
|
X108675000Y-115660000D03*
|
|
%TO.P,U10,37,VREF_37*%
|
|
%TO.N,VDDA*%
|
|
X108175000Y-115660000D03*
|
|
%TO.P,U10,38,SOC_38*%
|
|
%TO.N,unconnected-(U10A-SOC-Pad38)*%
|
|
X107675000Y-115660000D03*
|
|
%TO.P,U10,39,SOB_39*%
|
|
%TO.N,/drv8316/SOB*%
|
|
X107175000Y-115660000D03*
|
|
%TO.P,U10,40,SOA_40*%
|
|
%TO.N,/drv8316/SOA*%
|
|
X106675000Y-115660000D03*
|
|
D24*
|
|
%TO.P,U10,41,EPAD_41*%
|
|
%TO.N,GND*%
|
|
X106925000Y-117635000D03*
|
|
X106925000Y-118985000D03*
|
|
X106925000Y-120335000D03*
|
|
X107800000Y-116385000D03*
|
|
X107800000Y-117635000D03*
|
|
X107800000Y-118985000D03*
|
|
X107800000Y-120335000D03*
|
|
X107800000Y-121585000D03*
|
|
D25*
|
|
X108425000Y-118985000D03*
|
|
D24*
|
|
X109050000Y-116385000D03*
|
|
X109050000Y-117635000D03*
|
|
X109050000Y-118985000D03*
|
|
X109050000Y-120335000D03*
|
|
X109050000Y-121585000D03*
|
|
X109925000Y-117635000D03*
|
|
X109925000Y-118985000D03*
|
|
X109925000Y-120335000D03*
|
|
%TD*%
|
|
D26*
|
|
%TO.P,C29,1*%
|
|
%TO.N,Net-(U10A-CP)*%
|
|
X110810000Y-103605000D03*
|
|
%TO.P,C29,2*%
|
|
%TO.N,+15V*%
|
|
X112360000Y-103605000D03*
|
|
%TD*%
|
|
D27*
|
|
%TO.P,R1,1*%
|
|
%TO.N,+5V*%
|
|
X114080000Y-94005000D03*
|
|
%TO.P,R1,2*%
|
|
%TO.N,Net-(U1-VSENSE)*%
|
|
X115730000Y-94005000D03*
|
|
%TD*%
|
|
%TO.P,R9,1*%
|
|
%TO.N,/drv8316/SOB*%
|
|
X110760000Y-108625000D03*
|
|
%TO.P,R9,2*%
|
|
%TO.N,/stm32/SENS_B*%
|
|
X112410000Y-108625000D03*
|
|
%TD*%
|
|
D28*
|
|
%TO.P,D3,1,K_1*%
|
|
%TO.N,GND*%
|
|
X130697500Y-95330000D03*
|
|
%TO.P,D3,2,A_2*%
|
|
%TO.N,/stm32/LED*%
|
|
X132572500Y-95330000D03*
|
|
%TD*%
|
|
D29*
|
|
%TO.P,U4,1,I/O1_1*%
|
|
%TO.N,/stm32/USB_D-*%
|
|
X154877500Y-70750000D03*
|
|
%TO.P,U4,2,GND_2*%
|
|
%TO.N,GND*%
|
|
X154877500Y-71700000D03*
|
|
%TO.P,U4,3,I/O2_3*%
|
|
%TO.N,/stm32/USB_D+*%
|
|
X154877500Y-72650000D03*
|
|
%TO.P,U4,4,I/O2_4*%
|
|
%TO.N,Net-(J3-D+-PadA6)*%
|
|
X157152500Y-72650000D03*
|
|
%TO.P,U4,5,VBUS_5*%
|
|
%TO.N,VBUS*%
|
|
X157152500Y-71700000D03*
|
|
%TO.P,U4,6,I/O1_6*%
|
|
%TO.N,Net-(J3-D--PadA7)*%
|
|
X157152500Y-70750000D03*
|
|
%TD*%
|
|
D30*
|
|
%TO.P,J3,A1,GND_A1*%
|
|
%TO.N,GND*%
|
|
X139135000Y-83105000D03*
|
|
%TO.P,J3,A4,VBUS_A4*%
|
|
%TO.N,VBUS*%
|
|
X139935000Y-83105000D03*
|
|
D31*
|
|
%TO.P,J3,A5,CC1_A5*%
|
|
%TO.N,Net-(J3-CC1)*%
|
|
X141085000Y-83105000D03*
|
|
%TO.P,J3,A6,D+_A6*%
|
|
%TO.N,Net-(J3-D+-PadA6)*%
|
|
X142085000Y-83105000D03*
|
|
%TO.P,J3,A7,D-_A7*%
|
|
%TO.N,Net-(J3-D--PadA7)*%
|
|
X142585000Y-83105000D03*
|
|
%TO.P,J3,A8*%
|
|
%TO.N,N/C*%
|
|
X143585000Y-83105000D03*
|
|
D30*
|
|
%TO.P,J3,A9,VBUS_A9*%
|
|
%TO.N,VBUS*%
|
|
X144735000Y-83105000D03*
|
|
%TO.P,J3,A12,GND_A12*%
|
|
%TO.N,GND*%
|
|
X145535000Y-83105000D03*
|
|
%TO.P,J3,B1,GND_B1*%
|
|
X145535000Y-83105000D03*
|
|
%TO.P,J3,B4,VBUS_B4*%
|
|
%TO.N,VBUS*%
|
|
X144735000Y-83105000D03*
|
|
D31*
|
|
%TO.P,J3,B5,CC2_B5*%
|
|
%TO.N,Net-(J3-CC2)*%
|
|
X144085000Y-83105000D03*
|
|
%TO.P,J3,B6,D+_B6*%
|
|
%TO.N,Net-(J3-D+-PadA6)*%
|
|
X143085000Y-83105000D03*
|
|
%TO.P,J3,B7,D-_B7*%
|
|
%TO.N,Net-(J3-D--PadA7)*%
|
|
X141585000Y-83105000D03*
|
|
%TO.P,J3,B8*%
|
|
%TO.N,N/C*%
|
|
X140585000Y-83105000D03*
|
|
D30*
|
|
%TO.P,J3,B9,VBUS_B9*%
|
|
%TO.N,VBUS*%
|
|
X139935000Y-83105000D03*
|
|
%TO.P,J3,B12,GND_B12*%
|
|
%TO.N,GND*%
|
|
X139135000Y-83105000D03*
|
|
D32*
|
|
%TO.P,J3,SH,SHIELD_SH*%
|
|
%TO.N,unconnected-(J3-SHIELD-PadSH)*%
|
|
X138015000Y-83680000D03*
|
|
D33*
|
|
%TO.N,unconnected-(J3-SHIELD-PadSH)_1*%
|
|
X138015000Y-87860000D03*
|
|
D32*
|
|
%TO.N,unconnected-(J3-SHIELD-PadSH)_2*%
|
|
X146655000Y-83680000D03*
|
|
D33*
|
|
%TO.N,unconnected-(J3-SHIELD-PadSH)_3*%
|
|
X146655000Y-87860000D03*
|
|
%TD*%
|
|
D12*
|
|
%TO.P,D1,1,K_1*%
|
|
%TO.N,Net-(D1-K)*%
|
|
X121190000Y-91015000D03*
|
|
%TO.P,D1,2,A_2*%
|
|
%TO.N,GND*%
|
|
X125190000Y-91015000D03*
|
|
%TD*%
|
|
D34*
|
|
%TO.P,C28,1*%
|
|
%TO.N,+15V*%
|
|
X97025000Y-118635000D03*
|
|
%TO.P,C28,2*%
|
|
%TO.N,GND*%
|
|
X102425000Y-118635000D03*
|
|
%TD*%
|
|
D10*
|
|
%TO.P,TP5,1,1_1*%
|
|
%TO.N,/stm32/PWM_C*%
|
|
X134715000Y-76835000D03*
|
|
%TD*%
|
|
D26*
|
|
%TO.P,C25,1*%
|
|
%TO.N,DRV_VDDA*%
|
|
X110810000Y-101095000D03*
|
|
%TO.P,C25,2*%
|
|
%TO.N,GND*%
|
|
X112360000Y-101095000D03*
|
|
%TD*%
|
|
D13*
|
|
%TO.P,C16,1*%
|
|
%TO.N,VDD*%
|
|
X143185000Y-92475000D03*
|
|
%TO.P,C16,2*%
|
|
%TO.N,GND*%
|
|
X144145000Y-92475000D03*
|
|
%TD*%
|
|
D35*
|
|
%TO.P,J5,1,Pin_1_1*%
|
|
%TO.N,/stm32/UART_TX*%
|
|
X150735000Y-88705000D03*
|
|
D19*
|
|
%TO.P,J5,2,Pin_2_2*%
|
|
%TO.N,/stm32/UART_RX*%
|
|
X150735000Y-91245000D03*
|
|
%TO.P,J5,3,Pin_3_3*%
|
|
%TO.N,GND*%
|
|
X150735000Y-93785000D03*
|
|
%TD*%
|
|
D36*
|
|
%TO.P,L1,1,1_1*%
|
|
%TO.N,Net-(D1-K)*%
|
|
X106785000Y-83115000D03*
|
|
%TO.P,L1,2,2_2*%
|
|
%TO.N,+5V*%
|
|
X116685000Y-83115000D03*
|
|
%TD*%
|
|
D13*
|
|
%TO.P,C18,1*%
|
|
%TO.N,VDD*%
|
|
X143185000Y-94445000D03*
|
|
%TO.P,C18,2*%
|
|
%TO.N,GND*%
|
|
X144145000Y-94445000D03*
|
|
%TD*%
|
|
D10*
|
|
%TO.P,TP7,1,1_1*%
|
|
%TO.N,/stm32/SENS_B*%
|
|
X134715000Y-83935000D03*
|
|
%TD*%
|
|
D13*
|
|
%TO.P,C20,1*%
|
|
%TO.N,/stm32/SENS_A*%
|
|
X107665000Y-100825000D03*
|
|
%TO.P,C20,2*%
|
|
%TO.N,GND*%
|
|
X108625000Y-100825000D03*
|
|
%TD*%
|
|
%TO.P,C13,1*%
|
|
%TO.N,VDD*%
|
|
X140315000Y-92475000D03*
|
|
%TO.P,C13,2*%
|
|
%TO.N,GND*%
|
|
X141275000Y-92475000D03*
|
|
%TD*%
|
|
D10*
|
|
%TO.P,TP2,1,1_1*%
|
|
%TO.N,/stm32/BOOT*%
|
|
X131165000Y-80385000D03*
|
|
%TD*%
|
|
D37*
|
|
%TO.P,J7,1,Pin_1_1*%
|
|
%TO.N,/stm32/CAN_H*%
|
|
X132865000Y-64835000D03*
|
|
D38*
|
|
%TO.P,J7,2,Pin_2_2*%
|
|
%TO.N,/stm32/CAN_L*%
|
|
X135365000Y-64835000D03*
|
|
%TD*%
|
|
D39*
|
|
%TO.P,L2,1,1_1*%
|
|
%TO.N,Net-(U10B-SW_BK)*%
|
|
X110780000Y-112155000D03*
|
|
%TO.P,L2,2,2_2*%
|
|
%TO.N,Net-(U10B-FB_BK)*%
|
|
X113130000Y-112155000D03*
|
|
%TD*%
|
|
D13*
|
|
%TO.P,C24,1*%
|
|
%TO.N,VDDA*%
|
|
X107665000Y-108705000D03*
|
|
%TO.P,C24,2*%
|
|
%TO.N,GND*%
|
|
X108625000Y-108705000D03*
|
|
%TD*%
|
|
D40*
|
|
%TO.P,U5,1,VBAT_1*%
|
|
%TO.N,VDD*%
|
|
X149952500Y-77985000D03*
|
|
%TO.P,U5,2,PC13_2*%
|
|
%TO.N,/stm32/HALL_A*%
|
|
X149952500Y-78485000D03*
|
|
%TO.P,U5,3,PC14_3*%
|
|
%TO.N,/stm32/HALL_B*%
|
|
X149952500Y-78985000D03*
|
|
%TO.P,U5,4,PC15_4*%
|
|
%TO.N,/stm32/HALL_C*%
|
|
X149952500Y-79485000D03*
|
|
%TO.P,U5,5,OSC_IN_5*%
|
|
%TO.N,/stm32/HSE_IN*%
|
|
X149952500Y-79985000D03*
|
|
%TO.P,U5,6,OSC_OUT_6*%
|
|
%TO.N,/stm32/HSE_OUT*%
|
|
X149952500Y-80485000D03*
|
|
%TO.P,U5,7,nRST_7*%
|
|
%TO.N,/stm32/nRST*%
|
|
X149952500Y-80985000D03*
|
|
%TO.P,U5,8,TIM5_CH1_8*%
|
|
%TO.N,/stm32/ENC_A*%
|
|
X149952500Y-81485000D03*
|
|
%TO.P,U5,9,TIM5_CH2_9*%
|
|
%TO.N,/stm32/ENC_B*%
|
|
X149952500Y-81985000D03*
|
|
%TO.P,U5,10,USART2_TX_10*%
|
|
%TO.N,/stm32/UART_TX*%
|
|
X149952500Y-82485000D03*
|
|
%TO.P,U5,11,USART2_RX_11*%
|
|
%TO.N,/stm32/UART_RX*%
|
|
X149952500Y-82985000D03*
|
|
%TO.P,U5,12,PA4_12*%
|
|
%TO.N,/drv8316/DRV_OFF*%
|
|
X149952500Y-83485000D03*
|
|
D41*
|
|
%TO.P,U5,13,PA5_13*%
|
|
%TO.N,/stm32/LED*%
|
|
X151365000Y-84897500D03*
|
|
%TO.P,U5,14,PA6_14*%
|
|
%TO.N,/drv8316/NFAULT*%
|
|
X151865000Y-84897500D03*
|
|
%TO.P,U5,15,PA7_15*%
|
|
%TO.N,unconnected-(U5A-PA7-Pad15)*%
|
|
X152365000Y-84897500D03*
|
|
%TO.P,U5,16,ADC1_IN15_16*%
|
|
%TO.N,/stm32/SENS_A*%
|
|
X152865000Y-84897500D03*
|
|
%TO.P,U5,17,ADC1_IN12_17*%
|
|
%TO.N,/stm32/SENS_B*%
|
|
X153365000Y-84897500D03*
|
|
%TO.P,U5,18,PB2_18*%
|
|
%TO.N,unconnected-(U5A-PB2-Pad18)*%
|
|
X153865000Y-84897500D03*
|
|
%TO.P,U5,19,VSSA_19*%
|
|
%TO.N,GND*%
|
|
X154365000Y-84897500D03*
|
|
%TO.P,U5,20,VREF+_20*%
|
|
%TO.N,VDDA*%
|
|
X154865000Y-84897500D03*
|
|
%TO.P,U5,21,VDDA_21*%
|
|
X155365000Y-84897500D03*
|
|
%TO.P,U5,22,PB10_22*%
|
|
%TO.N,unconnected-(U5A-PB10-Pad22)*%
|
|
X155865000Y-84897500D03*
|
|
%TO.P,U5,23,VSS_23*%
|
|
%TO.N,GND*%
|
|
X156365000Y-84897500D03*
|
|
%TO.P,U5,24,VDD_24*%
|
|
%TO.N,VDD*%
|
|
X156865000Y-84897500D03*
|
|
D40*
|
|
%TO.P,U5,25,PB11_25*%
|
|
%TO.N,unconnected-(U5A-PB11-Pad25)*%
|
|
X158277500Y-83485000D03*
|
|
%TO.P,U5,26,TIM5_ETR_26*%
|
|
%TO.N,/stm32/ENC_Z*%
|
|
X158277500Y-82985000D03*
|
|
%TO.P,U5,27,TIM1_CH1N_27*%
|
|
%TO.N,/stm32/PWM_An*%
|
|
X158277500Y-82485000D03*
|
|
%TO.P,U5,28,TIM1_CH2N_28*%
|
|
%TO.N,/stm32/PWM_Bn*%
|
|
X158277500Y-81985000D03*
|
|
%TO.P,U5,29,TIM1_CH3N_29*%
|
|
%TO.N,/stm32/PWM_Cn*%
|
|
X158277500Y-81485000D03*
|
|
%TO.P,U5,30,TIM1_CH1_30*%
|
|
%TO.N,/stm32/PWM_A*%
|
|
X158277500Y-80985000D03*
|
|
%TO.P,U5,31,TIM1_CH2_31*%
|
|
%TO.N,/stm32/PWM_B*%
|
|
X158277500Y-80485000D03*
|
|
%TO.P,U5,32,TIM1_CH3_32*%
|
|
%TO.N,/stm32/PWM_C*%
|
|
X158277500Y-79985000D03*
|
|
%TO.P,U5,33,USB_DM_33*%
|
|
%TO.N,/stm32/USB_D-*%
|
|
X158277500Y-79485000D03*
|
|
%TO.P,U5,34,USB_DP_34*%
|
|
%TO.N,/stm32/USB_D+*%
|
|
X158277500Y-78985000D03*
|
|
%TO.P,U5,35,VSS_35*%
|
|
%TO.N,GND*%
|
|
X158277500Y-78485000D03*
|
|
%TO.P,U5,36,VDD_36*%
|
|
%TO.N,VDD*%
|
|
X158277500Y-77985000D03*
|
|
D41*
|
|
%TO.P,U5,37,PA13_37*%
|
|
%TO.N,/stm32/SWDIO*%
|
|
X156865000Y-76572500D03*
|
|
%TO.P,U5,38,PA14_38*%
|
|
%TO.N,/stm32/SWCLK*%
|
|
X156365000Y-76572500D03*
|
|
%TO.P,U5,39,I2C1_SCL_39*%
|
|
%TO.N,/stm32/I2C_SCL*%
|
|
X155865000Y-76572500D03*
|
|
%TO.P,U5,40,FDCAN3_RX_40*%
|
|
%TO.N,/stm32/FDCAN_RX*%
|
|
X155365000Y-76572500D03*
|
|
%TO.P,U5,41,FDCAN3_TX_41*%
|
|
%TO.N,/stm32/FDCAN_TX*%
|
|
X154865000Y-76572500D03*
|
|
%TO.P,U5,42,PB5_42*%
|
|
%TO.N,unconnected-(U5A-PB5-Pad42)*%
|
|
X154365000Y-76572500D03*
|
|
%TO.P,U5,43,PB6_43*%
|
|
%TO.N,unconnected-(U5A-PB6-Pad43)*%
|
|
X153865000Y-76572500D03*
|
|
%TO.P,U5,44,I2C1_SDA_44*%
|
|
%TO.N,/stm32/I2C_SDA*%
|
|
X153365000Y-76572500D03*
|
|
%TO.P,U5,45,BOOT0_45*%
|
|
%TO.N,/stm32/BOOT*%
|
|
X152865000Y-76572500D03*
|
|
%TO.P,U5,46,PB9_46*%
|
|
%TO.N,unconnected-(U5A-PB9-Pad46)*%
|
|
X152365000Y-76572500D03*
|
|
%TO.P,U5,47,VSS_47*%
|
|
%TO.N,GND*%
|
|
X151865000Y-76572500D03*
|
|
%TO.P,U5,48,VDD_48*%
|
|
%TO.N,VDD*%
|
|
X151365000Y-76572500D03*
|
|
%TD*%
|
|
D42*
|
|
%TO.P,R5,1*%
|
|
%TO.N,Net-(J3-CC1)*%
|
|
X160735000Y-78045000D03*
|
|
%TO.P,R5,2*%
|
|
%TO.N,GND*%
|
|
X161755000Y-78045000D03*
|
|
%TD*%
|
|
D43*
|
|
%TO.P,U1,1,BOOT_1*%
|
|
%TO.N,Net-(U1-BOOT)*%
|
|
X105925000Y-91725000D03*
|
|
%TO.P,U1,2,NC_2*%
|
|
%TO.N,unconnected-(U1-NC-Pad2)*%
|
|
X105925000Y-92995000D03*
|
|
%TO.P,U1,3,NC_3*%
|
|
%TO.N,unconnected-(U1-NC-Pad3)*%
|
|
X105925000Y-94265000D03*
|
|
%TO.P,U1,4,VSENSE_4*%
|
|
%TO.N,Net-(U1-VSENSE)*%
|
|
X105925000Y-95535000D03*
|
|
%TO.P,U1,5,EN_5*%
|
|
%TO.N,unconnected-(U1-EN-Pad5)*%
|
|
X111325000Y-95535000D03*
|
|
%TO.P,U1,6,GND_6*%
|
|
%TO.N,GND*%
|
|
X111325000Y-94265000D03*
|
|
%TO.P,U1,7,VIN_7*%
|
|
%TO.N,+15V*%
|
|
X111325000Y-92995000D03*
|
|
%TO.P,U1,8,PH_8*%
|
|
%TO.N,Net-(D1-K)*%
|
|
X111325000Y-91725000D03*
|
|
D44*
|
|
%TO.P,U1,9,GNDPAD_9*%
|
|
%TO.N,GND*%
|
|
X108025000Y-91830000D03*
|
|
X108025000Y-93030000D03*
|
|
X108025000Y-94330000D03*
|
|
X108025000Y-95430000D03*
|
|
D45*
|
|
X108625000Y-93630000D03*
|
|
D46*
|
|
X108625000Y-93630000D03*
|
|
D44*
|
|
X109225000Y-91830000D03*
|
|
X109225000Y-93030000D03*
|
|
X109225000Y-94330000D03*
|
|
X109225000Y-95430000D03*
|
|
%TD*%
|
|
D10*
|
|
%TO.P,TP3,1,1_1*%
|
|
%TO.N,/stm32/PWM_A*%
|
|
X131165000Y-83935000D03*
|
|
%TD*%
|
|
D27*
|
|
%TO.P,R6,1*%
|
|
%TO.N,GND*%
|
|
X158800000Y-92685000D03*
|
|
%TO.P,R6,2*%
|
|
%TO.N,Net-(U6-SHDN)*%
|
|
X160450000Y-92685000D03*
|
|
%TD*%
|
|
D10*
|
|
%TO.P,TP4,1,1_1*%
|
|
%TO.N,/stm32/PWM_B*%
|
|
X131165000Y-87485000D03*
|
|
%TD*%
|
|
D13*
|
|
%TO.P,C15,1*%
|
|
%TO.N,VDD*%
|
|
X140315000Y-96415000D03*
|
|
%TO.P,C15,2*%
|
|
%TO.N,GND*%
|
|
X141275000Y-96415000D03*
|
|
%TD*%
|
|
D47*
|
|
%TO.P,SW1,*%
|
|
%TO.N,*%
|
|
X138365000Y-78500000D03*
|
|
X146565000Y-78500000D03*
|
|
D48*
|
|
%TO.P,SW1,1,A_1*%
|
|
%TO.N,Net-(SW1-A)*%
|
|
X140465000Y-78500000D03*
|
|
D49*
|
|
%TO.P,SW1,2,B_2*%
|
|
%TO.N,/stm32/CAN_H*%
|
|
X142465000Y-78500000D03*
|
|
%TO.P,SW1,3,C_3*%
|
|
%TO.N,unconnected-(SW1-C-Pad3)*%
|
|
X144465000Y-78500000D03*
|
|
%TD*%
|
|
D50*
|
|
%TO.P,U8,1,VCCA_1*%
|
|
%TO.N,+5V*%
|
|
X147750000Y-121920000D03*
|
|
D51*
|
|
X147975000Y-121745000D03*
|
|
D50*
|
|
%TO.P,U8,2,A1_2*%
|
|
%TO.N,Net-(J9-Pin_1)*%
|
|
X147750000Y-122320000D03*
|
|
%TO.P,U8,3,A2_3*%
|
|
%TO.N,Net-(J9-Pin_2)*%
|
|
X147750000Y-122720000D03*
|
|
%TO.P,U8,4,A3_4*%
|
|
%TO.N,Net-(J9-Pin_3)*%
|
|
X147750000Y-123120000D03*
|
|
%TO.P,U8,5,A4_5*%
|
|
%TO.N,unconnected-(U8-A4-Pad5)*%
|
|
X147750000Y-123520000D03*
|
|
D52*
|
|
%TO.P,U8,6,GND_6*%
|
|
%TO.N,GND*%
|
|
X148400000Y-123520000D03*
|
|
D50*
|
|
%TO.P,U8,7,B4_7*%
|
|
%TO.N,unconnected-(U8-B4-Pad7)*%
|
|
X149050000Y-123520000D03*
|
|
%TO.P,U8,8,B3_8*%
|
|
%TO.N,/stm32/HALL_C*%
|
|
X149050000Y-123120000D03*
|
|
%TO.P,U8,9,B2_9*%
|
|
%TO.N,/stm32/HALL_B*%
|
|
X149050000Y-122720000D03*
|
|
%TO.P,U8,10,B1_10*%
|
|
%TO.N,/stm32/HALL_A*%
|
|
X149050000Y-122320000D03*
|
|
%TO.P,U8,11,VCCB_11*%
|
|
%TO.N,VDD*%
|
|
X149050000Y-121920000D03*
|
|
D52*
|
|
%TO.P,U8,12,OE_12*%
|
|
%TO.N,+5V*%
|
|
X148400000Y-121920000D03*
|
|
%TD*%
|
|
D42*
|
|
%TO.P,R7,1*%
|
|
%TO.N,Net-(SW1-A)*%
|
|
X160735000Y-80035000D03*
|
|
%TO.P,R7,2*%
|
|
%TO.N,/stm32/CAN_L*%
|
|
X161755000Y-80035000D03*
|
|
%TD*%
|
|
%TO.P,R4,1*%
|
|
%TO.N,Net-(J3-CC2)*%
|
|
X160735000Y-76055000D03*
|
|
%TO.P,R4,2*%
|
|
%TO.N,GND*%
|
|
X161755000Y-76055000D03*
|
|
%TD*%
|
|
D13*
|
|
%TO.P,C6,1*%
|
|
%TO.N,+5V*%
|
|
X123895000Y-65495000D03*
|
|
%TO.P,C6,2*%
|
|
%TO.N,GND*%
|
|
X124855000Y-65495000D03*
|
|
%TD*%
|
|
%TO.P,C8,1*%
|
|
%TO.N,VDD*%
|
|
X123895000Y-67465000D03*
|
|
%TO.P,C8,2*%
|
|
%TO.N,GND*%
|
|
X124855000Y-67465000D03*
|
|
%TD*%
|
|
D53*
|
|
%TO.P,Y1,1,1_1*%
|
|
%TO.N,/stm32/HSE_IN*%
|
|
X130915000Y-92385000D03*
|
|
%TO.P,Y1,2,G_2*%
|
|
%TO.N,GND*%
|
|
X133115000Y-92385000D03*
|
|
%TO.P,Y1,3,3_3*%
|
|
%TO.N,/stm32/HSE_OUT*%
|
|
X133115000Y-90685000D03*
|
|
%TO.P,Y1,4,G_4*%
|
|
%TO.N,GND*%
|
|
X130915000Y-90685000D03*
|
|
%TD*%
|
|
D27*
|
|
%TO.P,R2,1*%
|
|
%TO.N,Net-(U1-VSENSE)*%
|
|
X114080000Y-96515000D03*
|
|
%TO.P,R2,2*%
|
|
%TO.N,GND*%
|
|
X115730000Y-96515000D03*
|
|
%TD*%
|
|
D37*
|
|
%TO.P,J8,1,Pin_1_1*%
|
|
%TO.N,/stm32/CAN_H*%
|
|
X142315000Y-64835000D03*
|
|
D38*
|
|
%TO.P,J8,2,Pin_2_2*%
|
|
%TO.N,/stm32/CAN_L*%
|
|
X144815000Y-64835000D03*
|
|
%TD*%
|
|
D13*
|
|
%TO.P,C27,1*%
|
|
%TO.N,Net-(U10A-CPH)*%
|
|
X107665000Y-112645000D03*
|
|
%TO.P,C27,2*%
|
|
%TO.N,Net-(U10A-CPL)*%
|
|
X108625000Y-112645000D03*
|
|
%TD*%
|
|
%TO.P,C26,1*%
|
|
%TO.N,+15V*%
|
|
X107665000Y-110675000D03*
|
|
%TO.P,C26,2*%
|
|
%TO.N,GND*%
|
|
X108625000Y-110675000D03*
|
|
%TD*%
|
|
%TO.P,C23,1*%
|
|
%TO.N,VDD*%
|
|
X107665000Y-106735000D03*
|
|
%TO.P,C23,2*%
|
|
%TO.N,Net-(U10A-MODE)*%
|
|
X108625000Y-106735000D03*
|
|
%TD*%
|
|
D54*
|
|
%TO.P,J11,1,Pin_1_1*%
|
|
%TO.N,/stm32/ENC_B*%
|
|
X132865000Y-125185000D03*
|
|
D55*
|
|
%TO.P,J11,2,Pin_2_2*%
|
|
%TO.N,VDD*%
|
|
X135365000Y-125185000D03*
|
|
%TO.P,J11,3,Pin_3_3*%
|
|
%TO.N,/stm32/ENC_A*%
|
|
X137865000Y-125185000D03*
|
|
%TO.P,J11,4,Pin_4_4*%
|
|
%TO.N,/stm32/ENC_Z*%
|
|
X140365000Y-125185000D03*
|
|
%TO.P,J11,5,Pin_5_5*%
|
|
%TO.N,GND*%
|
|
X142865000Y-125185000D03*
|
|
%TD*%
|
|
D27*
|
|
%TO.P,R3,1*%
|
|
%TO.N,GND*%
|
|
X158800000Y-90175000D03*
|
|
%TO.P,R3,2*%
|
|
%TO.N,/stm32/BOOT*%
|
|
X160450000Y-90175000D03*
|
|
%TD*%
|
|
D26*
|
|
%TO.P,C17,1*%
|
|
%TO.N,VDDA*%
|
|
X158850000Y-87665000D03*
|
|
%TO.P,C17,2*%
|
|
%TO.N,GND*%
|
|
X160400000Y-87665000D03*
|
|
%TD*%
|
|
D13*
|
|
%TO.P,C14,1*%
|
|
%TO.N,VDD*%
|
|
X140315000Y-94445000D03*
|
|
%TO.P,C14,2*%
|
|
%TO.N,GND*%
|
|
X141275000Y-94445000D03*
|
|
%TD*%
|
|
D27*
|
|
%TO.P,R8,1*%
|
|
%TO.N,/drv8316/SOA*%
|
|
X110760000Y-106115000D03*
|
|
%TO.P,R8,2*%
|
|
%TO.N,/stm32/SENS_A*%
|
|
X112410000Y-106115000D03*
|
|
%TD*%
|
|
D14*
|
|
%TO.P,C4,1*%
|
|
%TO.N,Net-(U1-BOOT)*%
|
|
X124215000Y-63005000D03*
|
|
%TO.P,C4,2*%
|
|
%TO.N,Net-(D1-K)*%
|
|
X126115000Y-63005000D03*
|
|
%TD*%
|
|
D54*
|
|
%TO.P,J4,1,Pin_1_1*%
|
|
%TO.N,VDD*%
|
|
X151765000Y-64875000D03*
|
|
D55*
|
|
%TO.P,J4,2,Pin_2_2*%
|
|
%TO.N,/stm32/I2C_SCL*%
|
|
X154265000Y-64875000D03*
|
|
%TO.P,J4,3,Pin_3_3*%
|
|
%TO.N,/stm32/I2C_SDA*%
|
|
X156765000Y-64875000D03*
|
|
%TO.P,J4,4,Pin_4_4*%
|
|
%TO.N,GND*%
|
|
X159265000Y-64875000D03*
|
|
%TD*%
|
|
D56*
|
|
%TO.P,U2,1,GND_1*%
|
|
%TO.N,GND*%
|
|
X96275000Y-77890000D03*
|
|
%TO.P,U2,2,VO_2*%
|
|
%TO.N,VDDA*%
|
|
X96275000Y-80190000D03*
|
|
D57*
|
|
X102575000Y-80190000D03*
|
|
D56*
|
|
%TO.P,U2,3,VI_3*%
|
|
%TO.N,+5V*%
|
|
X96275000Y-82490000D03*
|
|
%TD*%
|
|
D42*
|
|
%TO.P,R10,1*%
|
|
%TO.N,DRV_VDDA*%
|
|
X112845000Y-115555000D03*
|
|
%TO.P,R10,2*%
|
|
%TO.N,/drv8316/NFAULT*%
|
|
X113865000Y-115555000D03*
|
|
%TD*%
|
|
D20*
|
|
%TO.P,J1,1,Pin_1_1*%
|
|
%TO.N,+15V*%
|
|
X99000000Y-64970000D03*
|
|
D21*
|
|
%TO.P,J1,2,Pin_2_2*%
|
|
%TO.N,GND*%
|
|
X104080000Y-64970000D03*
|
|
%TD*%
|
|
D10*
|
|
%TO.P,TP1,1,1_1*%
|
|
%TO.N,/stm32/nRST*%
|
|
X131165000Y-76835000D03*
|
|
%TD*%
|
|
D15*
|
|
%TO.P,C1,1*%
|
|
%TO.N,+15V*%
|
|
X120470000Y-78115000D03*
|
|
%TO.P,C1,2*%
|
|
%TO.N,Net-(C1-Pad2)*%
|
|
X123420000Y-78115000D03*
|
|
%TD*%
|
|
D58*
|
|
%TO.P,U7,1,1B_1*%
|
|
%TO.N,/stm32/Encoders/ENC_AL*%
|
|
X148487500Y-115140000D03*
|
|
%TO.P,U7,2,1A_2*%
|
|
%TO.N,/stm32/Encoders/ENC_AH*%
|
|
X148487500Y-115790000D03*
|
|
%TO.P,U7,3,1Y_3*%
|
|
%TO.N,Net-(U7-1Y)*%
|
|
X148487500Y-116440000D03*
|
|
%TO.P,U7,4,G_4*%
|
|
%TO.N,GND*%
|
|
X148487500Y-117090000D03*
|
|
%TO.P,U7,5,2Y_5*%
|
|
%TO.N,Net-(U7-2Y)*%
|
|
X148487500Y-117740000D03*
|
|
%TO.P,U7,6,2A_6*%
|
|
%TO.N,/stm32/Encoders/ENC_BH*%
|
|
X148487500Y-118390000D03*
|
|
%TO.P,U7,7,2B_7*%
|
|
%TO.N,/stm32/Encoders/ENC_BL*%
|
|
X148487500Y-119040000D03*
|
|
%TO.P,U7,8,GND_8*%
|
|
%TO.N,GND*%
|
|
X148487500Y-119690000D03*
|
|
%TO.P,U7,9,3B_9*%
|
|
%TO.N,/stm32/Encoders/ENC_ZL*%
|
|
X154212500Y-119690000D03*
|
|
%TO.P,U7,10,3A_10*%
|
|
%TO.N,/stm32/Encoders/ENC_ZH*%
|
|
X154212500Y-119040000D03*
|
|
%TO.P,U7,11,3Y_11*%
|
|
%TO.N,Net-(U7-3Y)*%
|
|
X154212500Y-118390000D03*
|
|
%TO.P,U7,12,~{G}_12*%
|
|
%TO.N,GND*%
|
|
X154212500Y-117740000D03*
|
|
%TO.P,U7,13,4Y_13*%
|
|
%TO.N,unconnected-(U7-4Y-Pad13)*%
|
|
X154212500Y-117090000D03*
|
|
%TO.P,U7,14,4A_14*%
|
|
%TO.N,unconnected-(U7-4A-Pad14)*%
|
|
X154212500Y-116440000D03*
|
|
%TO.P,U7,15,4B_15*%
|
|
%TO.N,unconnected-(U7-4B-Pad15)*%
|
|
X154212500Y-115790000D03*
|
|
%TO.P,U7,16,VDD_16*%
|
|
%TO.N,+5V*%
|
|
X154212500Y-115140000D03*
|
|
%TD*%
|
|
D16*
|
|
%TO.P,J12,1,Pin_1_1*%
|
|
%TO.N,/drv8316/OUT_A*%
|
|
X99105000Y-109785000D03*
|
|
D17*
|
|
%TO.P,J12,2,Pin_2_2*%
|
|
%TO.N,/drv8316/OUT_B*%
|
|
X102105000Y-109785000D03*
|
|
%TO.P,J12,3,Pin_3_3*%
|
|
%TO.N,/drv8316/OUT_C*%
|
|
X99105000Y-112785000D03*
|
|
%TO.P,J12,4,Pin_4_4*%
|
|
%TO.N,unconnected-(J12-Pin_4-Pad4)*%
|
|
X102105000Y-112785000D03*
|
|
%TD*%
|
|
D59*
|
|
%TO.P,U6,1,TXD_1*%
|
|
%TO.N,/stm32/FDCAN_TX*%
|
|
X149727500Y-70705000D03*
|
|
%TO.P,U6,2,GND_2*%
|
|
%TO.N,GND*%
|
|
X149727500Y-71355000D03*
|
|
%TO.P,U6,3,VCC_3*%
|
|
%TO.N,VDD*%
|
|
X149727500Y-72005000D03*
|
|
%TO.P,U6,4,RXD_4*%
|
|
%TO.N,/stm32/FDCAN_RX*%
|
|
X149727500Y-72655000D03*
|
|
%TO.P,U6,5,SHDN_5*%
|
|
%TO.N,Net-(U6-SHDN)*%
|
|
X152002500Y-72655000D03*
|
|
%TO.P,U6,6,CANL_6*%
|
|
%TO.N,/stm32/CAN_L*%
|
|
X152002500Y-72005000D03*
|
|
%TO.P,U6,7,CANH_7*%
|
|
%TO.N,/stm32/CAN_H*%
|
|
X152002500Y-71355000D03*
|
|
%TO.P,U6,8,STB_8*%
|
|
%TO.N,Net-(U6-SHDN)*%
|
|
X152002500Y-70705000D03*
|
|
%TD*%
|
|
D13*
|
|
%TO.P,C10,1*%
|
|
%TO.N,/stm32/HSE_IN*%
|
|
X137445000Y-94445000D03*
|
|
%TO.P,C10,2*%
|
|
%TO.N,Net-(C10-Pad2)*%
|
|
X138405000Y-94445000D03*
|
|
%TD*%
|
|
D26*
|
|
%TO.P,C7,1*%
|
|
%TO.N,VDDA*%
|
|
X114130000Y-91495000D03*
|
|
%TO.P,C7,2*%
|
|
%TO.N,GND*%
|
|
X115680000Y-91495000D03*
|
|
%TD*%
|
|
D50*
|
|
%TO.P,U9,1,VCCA_1*%
|
|
%TO.N,+5V*%
|
|
X151175000Y-121920000D03*
|
|
D51*
|
|
X151400000Y-121745000D03*
|
|
D50*
|
|
%TO.P,U9,2,A1_2*%
|
|
%TO.N,Net-(U7-1Y)*%
|
|
X151175000Y-122320000D03*
|
|
%TO.P,U9,3,A2_3*%
|
|
%TO.N,Net-(U7-2Y)*%
|
|
X151175000Y-122720000D03*
|
|
%TO.P,U9,4,A3_4*%
|
|
%TO.N,Net-(U7-3Y)*%
|
|
X151175000Y-123120000D03*
|
|
%TO.P,U9,5,A4_5*%
|
|
%TO.N,unconnected-(U9-A4-Pad5)*%
|
|
X151175000Y-123520000D03*
|
|
D52*
|
|
%TO.P,U9,6,GND_6*%
|
|
%TO.N,GND*%
|
|
X151825000Y-123520000D03*
|
|
D50*
|
|
%TO.P,U9,7,B4_7*%
|
|
%TO.N,unconnected-(U9-B4-Pad7)*%
|
|
X152475000Y-123520000D03*
|
|
%TO.P,U9,8,B3_8*%
|
|
%TO.N,/stm32/ENC_Z*%
|
|
X152475000Y-123120000D03*
|
|
%TO.P,U9,9,B2_9*%
|
|
%TO.N,/stm32/ENC_B*%
|
|
X152475000Y-122720000D03*
|
|
%TO.P,U9,10,B1_10*%
|
|
%TO.N,/stm32/ENC_A*%
|
|
X152475000Y-122320000D03*
|
|
%TO.P,U9,11,VCCB_11*%
|
|
%TO.N,VDD*%
|
|
X152475000Y-121920000D03*
|
|
D52*
|
|
%TO.P,U9,12,OE_12*%
|
|
%TO.N,+5V*%
|
|
X151825000Y-121920000D03*
|
|
%TD*%
|
|
D15*
|
|
%TO.P,C3,1*%
|
|
%TO.N,Net-(C2-Pad2)*%
|
|
X120470000Y-86615000D03*
|
|
%TO.P,C3,2*%
|
|
%TO.N,GND*%
|
|
X123420000Y-86615000D03*
|
|
%TD*%
|
|
D56*
|
|
%TO.P,U3,1,GND_1*%
|
|
%TO.N,GND*%
|
|
X96275000Y-86215000D03*
|
|
%TO.P,U3,2,VO_2*%
|
|
%TO.N,VDD*%
|
|
X96275000Y-88515000D03*
|
|
D57*
|
|
X102575000Y-88515000D03*
|
|
D56*
|
|
%TO.P,U3,3,VI_3*%
|
|
%TO.N,+5V*%
|
|
X96275000Y-90815000D03*
|
|
%TD*%
|
|
D13*
|
|
%TO.P,C9,1*%
|
|
%TO.N,GND*%
|
|
X137445000Y-92475000D03*
|
|
%TO.P,C9,2*%
|
|
%TO.N,/stm32/nRST*%
|
|
X138405000Y-92475000D03*
|
|
%TD*%
|
|
D35*
|
|
%TO.P,J6,1,Pin_1_1*%
|
|
%TO.N,/stm32/SWDIO*%
|
|
X155325000Y-88705000D03*
|
|
D19*
|
|
%TO.P,J6,2,Pin_2_2*%
|
|
%TO.N,/stm32/SWCLK*%
|
|
X155325000Y-91245000D03*
|
|
%TO.P,J6,3,Pin_3_3*%
|
|
%TO.N,GND*%
|
|
X155325000Y-93785000D03*
|
|
%TD*%
|
|
D13*
|
|
%TO.P,C22,1*%
|
|
%TO.N,Net-(U10B-FB_BK)*%
|
|
X107665000Y-104765000D03*
|
|
%TO.P,C22,2*%
|
|
%TO.N,GND*%
|
|
X108625000Y-104765000D03*
|
|
%TD*%
|
|
M02*
|